Lattice Mapping Report File Design: led Family: LAV-AT Device: LAV-AT-E70 Package: LFG1156 Performance Grade: 3 Mapper: version Radiant Software (64-bit) 2025.1.0.39.0 Mapped on: Mon Feb 9 14:21:57 2026 Design Information Command line: map -pdc D:/Avant_E70_Development_Board/test_project/Blinking Lights_QSPI/LED/led.pdc -i LED_impl_1_syn.udb -o LED_impl_1_map.udb -mp LED_impl_1.mrp -hierrpt -gui -msgset D:/Avant_E70_Development_Board/test_project/Blinking Lights_QSPI/LED/promote.xml Design Summary Number of registers: 28 out of 399114 (<1%) Number of SLICE registers: 28 out of 397440 (<1%) Number of PIO Input registers: 0 out of 558 (0%) Number of PIO Output registers: 0 out of 558 (0%) Number of PIO Tri-State registers: 0 out of 558 (0%) Number of LUT4s: 50 out of 397440 (<1%) Number used as logic LUT4s: 22 Number used as distributed RAM: 0 (6 per 16X4 or 32X2 RAM) Number used as ripple logic: 28 (2 per CCU2) Number of PIOs used/reserved: 28 out of 558 (5%) Number of wide range IOs used/reserved: 17 out of 99 (17%) Number of high performance IOs used/reserved: 11 out of 459 (2%) Number of generic IOs used: 0 (either wide range or high performance) Number of wide range IOs reserved: 10 (per sysConfig/prohibit constraint) Number of IOs used: 18 Number used for single ended IO: 18 Number of pairs used for differential IO: 0 Number allocated to wide range IOs: 7 out of 99 (7%) Number allocated to high performance IOs: 11 out of 459 (2%) (either wide range or high performance) Number of IDDR/ODDR functions used: 0 out of 1116 (0%) Number of IOs using at least one DDR function: 0 (0 differential) Minimum Number of 32K Block RAMs: 0 out of 990 (0%) Minimum Number of DSP Blocks: 0 out of 1800 (0%) Number of PLLs: 0 out of 11 (0%) Number of DDRDLLs: 0 out of 13 (0%) Number of DLLDELs: 0 out of 44 (0%) Number of DCSs: 0 out of 4 (0%) Number of DCCs: 0 out of 344 (0%) Number of ECLKDIVs: 0 out of 45 (0%) Number of ECLKSYNCs: 0 out of 54 (0%) Number of DDRPHYs: 0 out of 3 (0%) Number of Oscillator: 0 out of 1 (0%) Number of GSR: 0 out of 1 (0%) Number of ATM: 0 out of 1 (0%) Number of TSALL: 0 out of 1 (0%) Number of JTAG: 0 out of 1 (0%) Number of LMMI Slave: 0 out of 1 (0%) Number of SED: 0 out of 1 (0%) Number of Config WDT: 0 out of 1 (0%) Number of Clocks: 1 Net osc_clk_c[0]: 28 loads, 28 rising, 0 falling (Driver: Port osc_clk) Number of Clock Enables: 0 Number of LSRs: 1 Pin rst: 28 loads, 28 SLICEs (Net: rst_c) Top 10 highest fanout non-clock nets: Net rst_c: 28 loads Net count_num14_19: 14 loads Net count_num14_20: 14 loads Net count_num14_24: 14 loads Net un5_count_num_1_axb_23: 6 loads Net un5_count_num_1_axb_24: 6 loads Net un5_count_num_1_axb_25: 6 loads Net un5_count_num_1_axb_26: 6 loads Net un5_count_num_1_axb_0: 2 loads Net un5_count_num_1_cry_10_0_S1: 2 loads Number of warnings: 0 Number of criticals: 0 Number of errors: 0 Design Errors/Criticals/Warnings No error, critical, or warning presents. IO (PIO) Attributes +---------------------+-----------+-----------+-------+-------+-----------+ | IO Name | Direction | Levelmode | IO | IO | Special | | | | IO_TYPE | REG | DDR | IO Buffer | +---------------------+-----------+-----------+-------+-------+-----------+ | osc_clk | INPUT | LVCMOS33 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | rst | INPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[0] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[1] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[2] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[3] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[4] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[5] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[6] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_0[7] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[0] | OUTPUT | LVCMOS33 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[1] | OUTPUT | LVCMOS33 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[2] | OUTPUT | LVCMOS33 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[3] | OUTPUT | LVCMOS33 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[4] | OUTPUT | LVCMOS33 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[5] | OUTPUT | LVCMOS33 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[6] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | LED_1[7] | OUTPUT | LVCMOS18 | | | | +---------------------+-----------+-----------+-------+-------+-----------+ Removed logic Block GSR_INST undriven or does not drive anything - clipped. Block GND_cZ was optimized away. Block rst_ibuf_RNIUUM54 was optimized away. Block VCC_cZ was optimized away. ASIC Components Constraint Summary Total number of constraints: 45 Total number of constraints dropped: 0 Run Time and Memory Usage Total CPU Time: 28 secs Total REAL Time: 28 secs Peak Memory Usage: 567 MB Checksum -- map: b32f01c75f34fbc15579754e7ca3069c5859caa3 Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2025 Lattice Semiconductor Corporation, All rights reserved.